-- OK --
-----------------> BLESK ver.2021-02-27 run on Wed Apr 19 21:22:45 2023 UTC
-- File 20230419_104804_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2023-04-19T10:48:07.000.000.000 to 2023-04-19T10:48:07.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20230419_104804_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  005C2FD0 02723830 03A59210 023BAD80 01933DA0 035AA370 02F7F2C0 038C0BA0 004A0E70 006F0940 00588DE0
      00588DE0 0274CB10 014EAE90 03E9F9D0 000E8290 0304E1E0 00869110 02C5D990 01A73550 0374AFF0 02CEF800
      02CEF800 03A98400 027D4600 0343E500 02E21780 01C98E20 0196A490 035DF6D0 00F30DB0 008A8B60 02CFCED0
      02CFCED0 01A829B0 017C3D60 03C223D0 00233230 0032AB20 0115FF50 01CF8070 01284040 01BC6060 03625050
      03625050 00D37870 00BAC440 00E7A660 02947550 01DE4FF0 01316800 00D4EE00 005F4C80 0070EAC0 00489FA0
      00489FA0 026CD070 035AB840 02F7E460 018C1650 034A1D70 02EF13C0 03989A20 002A6B90 031FAF20 009078B0
      009078B0 00D844E0 02B46690 01EE55D0 03197F30 0295C0A0 01DF20F0 0130B080 01A8E8C0 02BE4E50 00F0B4B0
      00F0B4B0 0088EEE0 02CC9990 01AAD550 037FBFF0 02C06000 03A05000 02707800 03484400 02EC6600 01CD2A80
      01CD2A80 0095DFE0 02DF3010 01B0A810 0368FC10 00DC8210 02B2C310 01EBA290 031E73D0 00914A30 00D9EF20
      00D9EF20 015A8C50 01FBE530
     
