-- OK --
-----------------> BLESK ver.2021-02-27 run on Tue Apr 18 21:44:20 2023 UTC
-- File 20230418_173624_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2023-04-18T17:36:27.000.000.000 to 2023-04-18T17:36:27.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20230418_173624_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  01FA1880 010714C0 01849EA0 0346D1F0 02E5B900 03976580 025CD740 0372BCE0 00CBE290 035709E0 027E4680
      027E4680 01A0B2E0 03B875C0 03322790 00AB3450 02FEAE70 0381F940 024105E0 01618710 03D14490 0039E6D0
      0039E6D0 022515B0 03379F60 02562860 02BE9E20 01E1D130 011139A0 0399A570 025577C0 037FCC20 00C02A30
      00C02A30 00A03F20 02F020B0 038830E0 02261440 039A8F30 0257C8A0 017C2CF0 01C23A80 012327C0 01B2B420
      01B2B420 036BEE30 02DE1920 01B115B0 01699F60 03EEA860 020CFE20 010A8130 018FC1A0 03482170 02EC31C0
      02EC31C0 039A2920 00573DB0 007CA360 0242F2D0 01638BB0 02E92730 03CEDA50 0029B770 003D6CC0 0023DAA0
      0023DAA0 023237F0 032B2C00 02BEBA00 03E1E700 02111480 03199EC0 034AA8D0 0077FE50 024C0170 036A01C0
      036A01C0 02DF0120 01B081B0 0168C160 03DCA1D0 0032F130 002B89A0 023E4D70 0190B5E0 03AC7780 027A4C40
      027A4C40 03476A60 00E4DF50 0296B0F0 03DDE880 02331CC0 032A92A0 00BFDBF0 00E03600 00481680 00360EE0
      00360EE0 022D0990 013B8D50
     
