-- OK --
-----------------> BLESK ver.2021-02-27 run on Tue Apr 18 21:06:48 2023 UTC
-- File 20230418_031038_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2023-04-18T03:10:41.000.000.000 to 2023-04-18T03:10:41.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20230418_031038_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  0037F7F0 002C0C00 003A0A00 00270F00 00348880 00176660 030E6AA0 0044AFF0 0066F800 00558400 007F4600
      007F4600 0040E500 00609780 0050DC40 0078B260 0244EB50 01669EF0 00EAE8C0 024FCE50 01682970 01DC3DC0
      01DC3DC0 01322320 03AB32B0 027EABE0 0141FE10 03E10110 00118190 02194150 008AF0F0 0067C440 00542660
      00542660 027E3550 01412FF0 01E1B800 01116400 0199D600 01553D00 01FFA380 01007240 02C025B0 03D01BB0
      03D01BB0 02381660 01241D50 03B613F0 026D1A00 035B9700 02F65C80 038D72C0 024BCBA0 016E2E70 00EC9CA0
      00EC9CA0 014D6970 01EBDDC0 011E3320 03912AB0 0259BFE0 01756010 03CFD010 00283810 023C2410 01223610
      01223610 03D99680 011AAEE0 0397F990 005C0550 027207F0 034B0400 02EE8600 0399C500 02552780 037FB440
      037FB440 02C06E60 02D02CA0 00DC1D70 00B213C0 00EB1A20 029E9730 03D1DCA0 003932F0 0025AB80 00377E40
      00377E40 002CC160 023AA1D0 0093F890 036D0260 00DB8350 02B642F0 03ED6380 021BD240 03163B60 009D26D0
      009D26D0 02D3B5B0 03BA6F60
     
