-- OK --
-----------------> BLESK ver.2021-02-27 run on Sat Apr 15 22:52:02 2023 UTC
-- File 20230415_161815_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2023-04-15T16:18:18.000.000.000 to 2023-04-15T16:18:18.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20230415_161815_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  0018B180 0014E940 001E9DE0 0308E980 01464EA0 01F2B4F0 0085F740 00C70CE0 02A48A90 01F6CFD0 030DA830
      030DA830 028B7C20 01CEC230 0129A320 03BD72B0 0263CBE0 02A91700 01FECE40 0101A960 03817DD0 0041C330
      0041C330 006122A0 0251B3F0 03796A00 02C5DF00 03A73080 0274A8C0 03A77E50 003A60B0 002750E0 0234F890
      0234F890 012E84D0 03B9C6B0 026525E0 0157B710 03FC6C90 00025AD0 020377B0 03816630 0320EA90 00B09FD0
      00B09FD0 02E8D030 039CB820 0052E430 007B9620 02465D30 036573A0 00D7CA70 00BC2F40 02711C70 01A4C920
      01A4C920 0376ADB0 02CDFB60 01AB06D0 037E85B0 02C1C760 01A124D0 0371B6B0 02C96DE0 01ADDB10 03BD9B40
      03BD9B40 0331AB70 02A97EC0 03FDC1A0 00032170 0002B1C0 0003E920 02021DB0 03031360 00829AD0 02C3D7B0
      02C3D7B0 03D11E30 031CC890 0092ACD0 02DBFAB0 03B607E0 006D0410 025B8610 01764510 03CD6790 002BD450
      002BD450 023E3E70 019090A0 01AC6C70 017A5A40 01C77760 0324CCD0 00B6AAB0 00EDFFE0 029B0010 01D68010
      01D68010 033DC010 00A32010
     
