-- OK --
-----------------> BLESK ver.2021-02-27 run on Wed Apr 12 21:05:38 2023 UTC
-- File 20230412_024450_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2023-04-12T02:44:53.000.000.000 to 2023-04-12T02:44:53.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20230412_024450_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  00DBDC70 00B63240 00ED2B60 029BBED0 01D661B0 013D5160 03A3F9D0 00720530 004B07A0 026E8470 0359C640
      0359C640 02F52560 018FB7D0 03486C30 02EC5A20 019A7730 01574CA0 01FE7570 01014FC0 0181E820 03411C30
      03411C30 02E19220 01915B30 0159F6A0 03F50DF0 020F8B00 03084E80 014634E0 03F29740 020BDCE0 010E3290
      010E3290 03892BD0 004DBE30 006B6120 025ED1B0 0371B960 00C965D0 02ADD730 03FD9E50 0001A8B0 00017CE0
      00017CE0 0201C290 010123D0 0381B230 02416B20 0161DEB0 01D131E0 0339A910 00A57D90 037BE1A0 006308B0
      006308B0 00528CE0 027BCA90 01462FD0 03E53830 0217A420 011C7630 01924D20 035B6BB0 02F6DE60 02C6D8A0
      02C6D8A0 00D2DA70 00BBB740 00E66CE0 02955A90 01DFF7D0 03300C30 02A80A20 01FC0F30 010208A0 03830CF0
      03830CF0 01214540 02D8F3F0 03B48A00 026ECF00 0359A880 02F57CC0 038FC2A0 004823F0 006C3200 005A2B00
      005A2B00 00773E80 002650E0 031ABC40 0297E260 01DC1350 03321AF0 02AB1780 03FE9C40 0201D260 01013B50
      01013B50 0381A6F0 02417580
     
