-- OK --
-----------------> BLESK ver.2021-02-27 run on Sat Apr  8 14:03:56 2023 UTC
-- File 20230405_025107_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2023-04-05T02:51:10.000.000.000 to 2023-04-05T02:51:10.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20230405_025107_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  000E6C00 00095A00 000DF700 000B0C80 000E8AC0 0009CFA0 020D2870 0185DE20 01A39890 03B92A60 0065BF50
      0065BF50 025760F0 037CD080 02C2B8C0 03A3E4A0 007216F0 004B1D80 006E9340 0059DAE0 033A9BC0 0353EB10
      0353EB10 00FA1E90 028711D0 01C49930 0126D5A0 03B5BF70 026F60C0 0358D0A0 00F4B8F0 008EE480 0064CB60
      0064CB60 032B5760 00BEFCD0 02E182B0 039143E0 0059E210 02751310 014F9A90 03E857D0 001C7C30 00124220
      00124220 010DB190 03C5B4A0 00276EF0 0034D980 002EB540 0039EFE0 02251810 01379410 03AC5E10 007A7110
      007A7110 02474990 02B276A0 00F5A6F0 008F7580 00C8CF40 00ACA8E0 02FAFC90 018782D0 034443B0 02E66260
      02E66260 01955350 035FFAF0 017803C0 02E20110 01930190 035A8150 00F7C1F0 008C2100 00CA3180 00AF2940
      00AF2940 00F8BDE0 0284E310 01C69290 0392EDE0 022DCD80 033B2B40 02A6BEE0 01F5E190 030F1150 008899F0
      008899F0 00CCD500 00AABF80 00FFE040 00801060 03600C20 00680510 025C0790 01720450 03CB0670 022E8540
      022E8540 0339C7E0 00A52410
     
