-- OK --
-----------------> BLESK ver.2021-02-27 run on Mon Apr  3 21:27:27 2023 UTC
-- File 20230403_095041_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2023-04-03T09:50:44.000.000.000 to 2023-04-03T09:50:44.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20230403_095041_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  03768C80 02CDCAC0 03AB2FA0 007EB870 0041E440 00611660 02519D50 017953F0 00E2FD00 0049C1C0 02369090
      02369090 012DD8D0 03BB34B0 0266AEE0 0155F990 03FF0550 000087F0 0000C400 0000A600 0000F500 000047C0
      000047C0 02003210 01002B10 03803E90 004021D0 02603130 035029A0 00F83D70 008423C0 00C63220 02A52B30
      02A52B30 03FBDF50 00031870 00029440 0003DE60 02023150 010329F0 0182BD00 0143E380 01E21240 01131B60
      01131B60 039A96D0 002BEED0 011F0CD0 03908AB0 0258CFE0 0174A810 03CEFC10 00298210 023D4310 0123E290
      0123E290 03B213D0 006B1A30 022F4B90 029C7720 01D24CB0 013B6AE0 03A6DF90 0075B050 024F6870 0368DC40
      0368DC40 02DCB260 01B2EB50 036B9EF0 016F28C0 02EC5E50 019A7170 015749C0 01FCED20 03029BB0 0283D660
      0283D660 01C23D50 032323F0 02B2B200 03EBEB00 010F0F40 02C44470 03A66640 02755560 014FFFD0 03E80030
      03E80030 021C0020 01120030 019B0020 03568030 02FDC020 00C19010 0350AC00 02F8FA00 03848700 0246C480
      0246C480 0365A6C0 02D775A0
     
