-- OK --
-----------------> BLESK ver.2021-02-27 run on Fri Mar 24 10:57:00 2023 UTC
-- File 20230324_021514_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2023-03-24T02:15:17.000.000.000 to 2023-03-24T02:15:17.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20230324_021514_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  02A38760 01F244D0 030B66B0 028ED5E0 01C9BF10 032D6090 025DE860 01731C50 03CA9270 022FDB40 033836E0
      033836E0 00A42D90 02F63B50 018D26F0 014BB580 01EE6F40 028CAC70 01E57D20 0317C3B0 029C2260 01D23350
      01D23350 033B2AF0 02A6BF80 03F5E040 020F1060 01089850 038CD470 01255F20 01DBF850 03360470 02AD0640
      02AD0640 03FB8560 000647D0 02056430 0307D620 00843D30 00C623A0 02A53270 01FBD5A0 01831FB0 01429060
      01429060 03E3D850 00123470 001B2E40 0016B960 021DE5D0 01131730 019A9CA0 0357D2F0 017E1DC0 02E08990
      02E08990 0190CD50 0358ABF0 02F4FE00 038E8100 0249C180 036D2140 02DBB1E0 01B66910 036D5D90 026DF9A0
      026DF9A0 00AD82B0 00FB43E0 0286E210 01C59310 03275A90 00B4F7D0 02EE8C30 0399CA20 00552F30 007FB8A0
      007FB8A0 01203270 00D815A0 02B41F70 03EE10C0 021918A0 011594F0 019F5E80 0150F1C0 01F88920 0304CDB0
      0304CDB0 0286AB60 02E2FF60 02C9C060 01AD2050 037BB070 02C66840 03A55C60 0077F250 024C0B70 036A0EC0
      036A0EC0 02DF09A0 01B08D70
     
