-- OK --
-----------------> BLESK ver.2021-02-27 run on Fri Mar 24 08:36:24 2023 UTC
-- File 20230323_120930_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2023-03-23T12:09:33.000.000.000 to 2023-03-23T12:09:33.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20230323_120930_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  00001A30 00001720 02001CB0 030012E0 00801B90 02C01650 01A01D70 017013C0 01C81A20 032C1730 02BA1CA0
      02BA1CA0 01E712F0 01149B80 019ED640 0151BD60 03F963D0 0002E910 0301CEC0 028129A0 01C1BD70 012163C0
      012163C0 01B1D220 03693B30 02DDA6A0 01B375F0 016ACF00 01DFA880 00983E60 036A10A0 00DF18F0 00B09480
      00B09480 00E8DEC0 009CB1A0 02D2E970 03BB9DC0 02665320 01557AB0 01FFC7E0 03801200 01200D80 01B00B40
      01B00B40 01680EE0 03DC0990 00320D50 022B0BF0 033E8E00 02A1C900 03F12D80 0209BB40 0386B370 0122F560
      0122F560 03B38FD0 006A4830 005F6C20 0270DA30 0348B720 00ECECB0 009A9AE0 02D7D790 01BC3C50 01B11130
      01B11130 02B4CCD0 01EEAAB0 0119FFE0 03950010 005F8010 02704010 01486010 03EC5010 001A7810 02174410
      02174410 028E7300 01E4A540 0116F7E0 039D8C10 00534A10 027AEF10 01479890 03E454D0 00167EB0 001D41E0
      001D41E0 0213E110 028D08C0 03E5C650 00172570 001CB7C0 0012EC20 021B9A30 03165720 009D7CB0 00D3C2E0
      00D3C2E0 02BA2390 01E73250
     
