-- OK --
-----------------> BLESK ver.2021-02-27 run on Thu Mar 23 20:05:12 2023 UTC
-- File 20220113_043031_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2022-01-13T04:30:34.000.000.000 to 2022-01-13T04:30:34.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20220113_043031_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  02F52700 038FB480 02486EC0 03B62CD0 00369D50 0116E9F0 00CECE80 0054D4E0 027EBE90 0141E1D0 03E11130
      03E11130 021199A0 01195570 0195FFC0 015F0020 03F08030 0208C020 00865010 0362BC00 02D3E200 03BA1300
      03BA1300 02671A80 035497C0 02FEDC20 0181B230 01416B20 03E1DEB0 021131E0 028CD480 01E55F60 0317F0D0
      0317F0D0 009C08B0 00D20CE0 02BB0A90 01E68FD0 0315C830 029F2C20 01D0BA30 0138E720 01D24A50 019DB7B0
      019DB7B0 01536C60 03FADA50 0007B770 00046CC0 00065AA0 020577F0 0307CC00 02842A00 03C63F00 01129040
      01129040 02CDEC30 03AB1A20 007E9730 0041DCA0 026132F0 0351AB80 02F97E40 0385C160 004721D0 0264B130
      0264B130 03AB74D0 003F6750 0220D4F0 0330BE80 02A8E1C0 03FC9120 0002D9B0 0003B560 02026FD0 01035830
      01035830 0182F420 01A1C710 03B89240 0264DB60 0156B6D0 03FDEDB0 02031B60 010296D0 0383DDB0 02423360
      02423360 01632AD0 03D2BFB0 031DF030 03498410 00ED4610 029BE510 01D61790 033D1C50 00A39270 00F25B40
      00F25B40 008B76E0 02CECD90
     
