-- OK --
-----------------> BLESK ver.2021-02-27 run on Thu Mar  3 19:52:51 2022 UTC
-- File 20220101_012400_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2022-01-01T01:24:03.000.000.000 to 2022-01-01T01:24:03.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20220101_012400_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  03894A50 004DEF70 006B18C0 005E94A0 0271DEF0 03493180 02EDA940 039B7DE0 022B6180 019F68A0 01A86E70
      01A86E70 00BE2CA0 02E13AF0 0391A780 02597440 0375CE60 00CF2950 02A8BDF0 03FCE300 02029280 0303DBC0
      0303DBC0 03411B10 0270CB40 0348AEE0 00ECF990 029A8550 01D7C7F0 013C2400 01A23600 01732D00 01CABB80
      01CABB80 012FE640 02DC0AB0 03D907F0 02358400 032F4600 02B8E500 03E49780 0216DC40 031DB260 00936B50
      00936B50 02DADEF0 03B7B180 013634A0 01D69770 013DDCC0 01A332A0 0372ABF0 02CBFE00 03AE0100 02790180
      02790180 03458140 02E741E0 0194E110 03AF48C0 033C7650 00A24D70 00F36BC0 008ADE20 02CFB130 03A869A0
      03A869A0 007C5D70 004273C0 00634A20 0252EF30 03BDCC50 00319530 00295FA0 023DF070 03230840 02B28C60
      02B28C60 01EBCA50 031E2F70 029138C0 03D9A4A0 003576F0 0017E6C0 020E0AD0 01090FB0 018D8860 034B4C50
      034B4C50 00EEEA70 00999F40 00D550E0 02BFF890 01E004D0 031006B0 034C02F0 017501C0 01CF8120 032841B0
      032841B0 02BC6160 01E251D0
     
