-- OK --
-----------------> BLESK ver.2021-02-27 run on Tue Feb 15 23:46:50 2022 UTC
-- File 20211206_041704_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2021-12-06T04:17:07.000.000.000 to 2021-12-06T04:17:07.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20211206_041704_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  02CC5F50 01AA70F0 017F4880 01C0ECC0 01209AA0 03B0D7F0 0268BC00 035CE200 02F29300 01C5ED40 02938DF0
      02938DF0 01ED2580 008DDBA0 02CB3670 03AEAD40 0279FBE0 01450610 03E78510 00144790 021E6450 01115670
      01115670 0199FD40 02AA81F0 01FFE080 010010C0 018018A0 034014F0 02E01E80 039011C0 02581920 017415B0
      017415B0 01CE1F60 032910D0 005ECC50 0138D530 01A4BFA0 0376E070 02CD9040 03AB5860 007EF450 02418E70
      02418E70 03614940 02D1EDE0 01B91B10 03B2CB40 0335D770 02AF3CC0 03F8A2A0 0004F3F0 00068A00 0005CF00
      0005CF00 00072880 0004BCC0 0006E2A0 020593F0 0183AD00 00A13DC0 00F1A320 028972B0 03CDCBE0 002B2E10
      002B2E10 023EB910 0121E590 03B11750 00699CF0 005D5280 0039FDE0 03128180 029BC140 03D621E0 003D3110
      003D3110 0223A990 01327D50 03AB43F0 027EE200 03419300 02E15A80 01C8FBE0 03964300 025D6280 0373D3C0
      0373D3C0 02CA3A20 01AF2730 0178B4A0 03C4EEF0 02269980 0335D540 02AF3FE0 02FC5000 01C13C00 0121A200
      0121A200 01B17300 0169CA80
     
