-- OK --
-----------------> BLESK ver.2021-02-27 run on Thu Dec 30 02:04:56 2021 UTC
-- File 20210830_142910_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2021-08-30T14:29:13.000.000.000 to 2021-08-30T14:29:13.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20210830_142910_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  03C0E610 00209510 0230DF90 0128B050 03BCE870 02629C40 03A9E930 033E8ED0 0050E4D0 027896B0 0344DDE0
      0344DDE0 00E6B310 0295EA90 01DF1FD0 03309030 02A8D820 01FCB430 0102EE20 01C1CC90 03909560 0058DFD0
      0058DFD0 0274B030 034EE820 00E99C30 009D5220 02D3FB30 03BA06A0 006705F0 00548700 003F6240 021069B0
      021069B0 03185D60 009473D0 02DE4A30 03B16F20 0069D8B0 005D34E0 0273AE90 014A79D0 03EF4530 030C73D0
      030C73D0 00452510 0267B790 01546C50 03FE5A70 02017740 0301CCE0 00812A90 02C1BFD0 01A16030 0171D020
      0171D020 01E49C10 038B6900 024EDD80 0369B340 02DD6AE0 01B3DF90 036A3050 00DF2870 00B0BC40 00E8E260
      00E8E260 029C9350 00E96D70 004EEDE0 02699B10 015D5690 03F3FDD0 000A0330 000F02A0 020883F0 030CC200
      030CC200 028AA300 03CFF280 011405E0 03CF0380 02288240 033CC360 00A2A2D0 02F3F3B0 038A0A60 004F0F50
      004F0F50 026888F0 035CCC80 02F2AAC0 03C5FFD0 00138010 021A4010 01176010 039CD010 0052B810 027BE410
      027BE410 01461610 03E51D10
     
