-- OK --
-----------------> BLESK ver.2021-02-27 run on Wed Dec 29 11:23:17 2021 UTC
-- File 20210830_060030_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2021-08-30T06:00:33.000.000.000 to 2021-08-30T06:00:33.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20210830_060030_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  02F5BC00 038F6200 0248D300 036CBA80 02DAE7C0 03B79420 006C5E30 005A7120 027749B0 03A676B0 033AA6F0
      033AA6F0 0153FAC0 02FD03D0 00C1C110 02A12190 01F1B150 030969F0 028DDD00 03CB3380 022EAA40 0339FF60
      0339FF60 00A500D0 02F780B0 03C62070 01129820 039BD430 02563E20 017D2130 01C3B1A0 03226970 02B35DC0
      02B35DC0 03EAF320 001F8AB0 00104FE0 030C3400 01451700 01E79C80 011452C0 019E7BA0 03514670 02F9E540
      02F9E540 038517E0 00479C10 02645210 01567B10 03FEA340 0300F970 028085C0 03C0C720 0020A4B0 0030F6E0
      0030F6E0 02288D90 013CCB50 03A2AEF0 0273F980 034A0540 037783F0 01662100 01D53180 013FA940 01A07DE0
      01A07DE0 03704310 00C86290 02AC53D0 01FA7A30 01074720 0384E4B0 03234B70 01597760 03F5CCD0 000F2AB0
      000F2AB0 0008BFE0 020CE010 010A9010 038FD810 00483410 026C2E10 015A3910 03FB92C0 03032DD0 0082BB30
      0082BB30 00C3E6A0 02A215F0 03F31F00 020A9080 030FD8C0 028834A0 01CC2EF0 012A3980 00DF92A0 01582DF0
      01582DF0 01F43B00 010E2680
     
