-- OK --
-----------------> BLESK ver.2021-02-27 run on Mon Dec 27 08:55:43 2021 UTC
-- File 20210828_070529_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2021-08-28T07:05:32.000.000.000 to 2021-08-28T07:05:32.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20210828_070529_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  00CD8C60 02AB4A50 01FEEF70 010198C0 018154A0 01A0FF70 00B84060 02E46050 01965070 015D7840 01F3C460
      01F3C460 030A2650 008F3570 00C8AFC0 00ACF820 02FA8430 03C3E310 02110940 03198DE0 00954B10 02DFEE90
      02DFEE90 01B019D0 03681530 02DC1FA0 01B21070 016B1840 01DE9460 0398EF20 002A4C50 023F6A70 0320DF40
      0320DF40 02B0B0E0 01E8E890 031C9CD0 0092D2B0 00DBBBE0 02B66610 01ED5510 038DFFC0 03258010 00B74010
      00B74010 02ECE010 019A9010 0357D810 00FC3410 02822E10 01C33910 0322A590 00B3F750 01750670 00E7C2A0
      00E7C2A0 029423F0 03DE3200 02312B00 0329BE80 02BD61C0 03E3D120 001239B0 001B2560 0216B7D0 008EF610
      008EF610 0364C680 02D6A5C0 03BDF720 00630CB0 00528AE0 027BCF90 01462850 03E53C70 0217A240 031C7360
      031C7360 02492560 02B6DBE0 01EDB610 031B6D10 0096DB90 02DDB650 01B36D70 016ADBC0 01DFB620 03306D30
      03306D30 02A85BA0 00FE3B30 02409350 0160DAF0 01D0B780 0138EC40 01A49A60 0376D750 00CDBCF0 00AB6280
      00AB6280 00FED3C0 0081BA20
     
