-- OK --
-----------------> BLESK ver.2021-02-27 run on Mon Dec 27 06:28:30 2021 UTC
-- File 20210828_021105_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2021-08-28T02:11:08.000.000.000 to 2021-08-28T02:11:08.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20210828_021105_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  02A09880 03F0D4C0 03045F50 00433870 00315220 0229FB30 033D06A0 00A385F0 00F24700 008B6480 00CED6C0
      00CED6C0 00A9BDA0 02FD6370 0383D2C0 03211DD0 0058C990 0274AD50 014EFBF0 01E98600 011D4500 0193E780
      0193E780 015A1440 01F71E60 030C9150 008AD9F0 0067DA80 002A1BE0 023F1610 01209D10 03B0D390 0068BA50
      0068BA50 025CE770 037294C0 02CBDEA0 01AE31F0 01792900 00E2DEC0 0249D8D0 016D34B0 01DBAEE0 03367990
      03367990 00AD4550 02FBE7F0 03861400 02451E00 03679100 02D45980 01DF3AA0 019853F0 01547A00 01FE4700
      01FE4700 01016480 0181D6C0 01413DA0 03E1A370 021172C0 0319CBA0 00952E70 006FDCA0 012C1970 01BA15C0
      01BA15C0 01671F20 03D490B0 023ED8E0 0121B490 03B16ED0 0069D9B0 005D3560 0273AFD0 00A53C10 037BD100
      037BD100 02C63980 03A52540 0277B7E0 014C6C10 03EA5A10 001F7710 0210CC90 0118AAD0 0394FFB0 032F4030
      032F4030 035C7010 00F24810 028B6C10 01CEDA10 0329B710 00BD6C90 02E3DAD0 019237B0 015B2C60 03F6BA50
      03F6BA50 0006F3B0 0202C530
     
