-- OK --
-----------------> BLESK ver.2021-02-27 run on Tue Dec 21 08:27:05 2021 UTC
-- File 20210820_112747_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2021-08-20T11:27:50.000.000.000 to 2021-08-20T11:27:50.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20210820_112747_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  03162C30 029D3A20 01D3A730 013A74A0 03A74EF0 0274E980 034E9D40 02E9D3E0 019D3A10 0353A710 00FA7490
      00FA7490 02874ED0 01C4E9B0 02934EB0 03DAE9E0 00379D10 022C5390 013A7A50 03A74770 0274E4C0 034E96A0
      034E96A0 00E9DDF0 009D3300 0069D540 022E9FF0 0339D000 02A53800 03F7A400 020C7600 030A4D00 028F6B80
      028F6B80 03C8DE40 022CB160 013AE9D0 01D3CE90 039D14E0 00539E90 027A51D0 01477930 01E4C5A0 0316A770
      0316A770 029DF4C0 03D30EA0 003A89F0 0027CD00 001A15C0 020B8F90 010E4850 03896C70 024DDA40 036B3760
      036B3760 00DEACD0 02B1FAB0 03E907E0 001D8410 02134610 028D7280 01E5E5E0 03171710 009C9C90 02D2D2D0
      02D2D2D0 01BBBBB0 01666660 03D55550 003FFFF0 00200000 00300000 00140000 000F0000 00088000 000CC000
      000CC000 000AA000 000FF000 00080800 000C0C00 000A0A00 000F0F00 00088880 00066660 0302AAA0 0083FFF0
      0083FFF0 00C20000 00A30000 00F28000 008BC000 00CE2000 00A93000 00FDA800 00837C00 00616100 0028E8C0
      0028E8C0 003C9CA0 0222D2F0
     
