-- OK --
-----------------> BLESK ver.2021-02-27 run on Tue Dec 21 08:08:05 2021 UTC
-- File 20210820_111812_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2021-08-20T11:18:15.000.000.000 to 2021-08-20T11:18:15.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20210820_111812_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  00BF6D00 00E0DB80 0090B640 00D8ED60 02B49BD0 01EED630 0119BD20 039563B0 025FD260 01703B50 03C826F0
      03C826F0 022C3580 033A2F40 02A738E0 01F4A490 030EF6D0 00898DB0 0266A5B0 03AAFBB0 027F8660 01404550
      01404550 03E067F0 02105400 03187E00 02944100 03DE6180 02315140 0329F9E0 025E8280 01B8E1E0 03649110
      03649110 00D6D990 02BDB550 01E36FF0 0112D800 019BB400 01566E00 01FD5900 0103F580 00C107A0 0150C230
      0150C230 01F8A320 0304F2B0 02868BE0 01C5CE10 03272910 00B4BD90 02EEE350 019992F0 01555B80 00FFFB20
      00FFFB20 01400350 03E002F0 02100380 03180240 02940360 01DE02D0 033103B0 02A98260 01FD4350 0303E2F0
      0303E2F0 014109C0 02F0C690 0188A5D0 034CF730 02EA8CA0 019FCAF0 01502F80 01F83840 01042460 03863650
      03863650 00452D70 0033DDE0 03151980 029F9540 03D05FE0 00387010 02244810 01366C10 03AD5A10 007BF710
      007BF710 02460C90 01650AD0 01EBC7D0 018F1210 03489B10 00ECD690 029ABDD0 01D7E330 013C12A0 03A21BF0
      03A21BF0 02731600 034A9D00
     
