-- OK --
-----------------> BLESK ver.2021-02-27 run on Tue Dec 21 08:04:13 2021 UTC
-- File 20210820_111620_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2021-08-20T11:16:23.000.000.000 to 2021-08-20T11:16:23.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20210820_111620_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  03F2A390 000BF250 020E0B70 03090EC0 028D89A0 01CB4D70 012EEBC0 02DCCF10 02D95440 03DAFF30 031BC050
      031BC050 004B1030 006E9820 0259D430 03753E20 00CFA130 00A871A0 02FC4970 03826DC0 02435B20 0162F6B0
      0162F6B0 02E9C6F0 01CE92C0 0129DBA0 03BD3670 0263AD40 03527BE0 00FB4610 0286E510 01C59790 03275C50
      03275C50 00B4F270 007745A0 012673B0 01B54A60 036FEF50 00D818F0 00B41480 00EE1EC0 009911A0 02D59970
      02D59970 03BF55C0 0260FF20 00A84050 017E3030 01C12820 0321BC30 02B16220 01E9D330 011D3AA0 0393A7F0
      0393A7F0 025A7400 03774E00 02CCE900 01D54EC0 029FF4D0 01D00EB0 013809E0 03A40D10 00760B90 024D0E50
      024D0E50 016B8970 01DE4DC0 01316B20 03A9DEB0 033E98F0 0150EA40 01F89F60 0304D0D0 0086B8B0 00C5E4E0
      00C5E4E0 02A71690 01F49DD0 030ED330 0289BAA0 01CD67F0 0095EA00 006F8F80 00584840 00746C60 024E5A50
      024E5A50 01697770 01DDCCC0 01332AA0 03AABFF0 027FE000 03401000 01700C00 00E40500 00960780 00DD0440
      00DD0440 00B38660 02EA4550
     
