-- OK --
-----------------> BLESK ver.2021-02-27 run on Tue Dec 21 05:38:20 2021 UTC
-- File 20210820_094510_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2021-08-20T09:45:13.000.000.000 to 2021-08-20T09:45:13.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20210820_094510_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  02C833E0 02D61500 01DE8FC0 0298E410 02EA4B00 039F6E80 0250D9C0 0378B520 00C4EFB0 00A69860 02F5D450
      02F5D450 018F3E70 0148A140 01ECF1E0 038D4480 0125F360 03B70AD0 006C8FB0 005AC860 0277AC50 014C7A70
      014C7A70 01EA4740 011F64E0 0390D690 0058BDD0 013A7190 03D3A4A0 003A76F0 00274D80 0034EB40 002E9EE0
      002E9EE0 0239D190 01253950 03B7A5F0 026C7700 035A4C80 017BB560 03E337E0 0012AC10 021BFA10 01160710
      01160710 039D0490 005386D0 027A45B0 03476760 00E4D4D0 0296BEB0 03EEF0F0 010CC440 018AA660 034FF550
      034FF550 00E80FF0 009C0800 00D20C00 00BB0A00 00E68F00 0095C880 00DF2CC0 02585D50 00BA39F0 00E72500
      00E72500 0094B780 00DEEC40 00B19A60 02E95750 019DFCF0 01530280 01FA83C0 0107C220 01C21190 03918CA0
      03918CA0 00594AF0 0075EF80 004F1840 00689460 025CDE50 0172B170 01CBE9C0 012E1D20 03B913B0 0332CD30
      0332CD30 0355D5D0 00FF3F30 0080A0A0 02C0F0F0 03A08880 0270CCC0 0348AAA0 00ECFFF0 009A8000 00D7C000
      00D7C000 005E1000 00388C00
     
