-- OK --
-----------------> BLESK ver.2021-02-27 run on Tue Dec 14 03:03:35 2021 UTC
-- File 20210813_052827_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2021-08-13T05:28:30.000.000.000 to 2021-08-13T05:28:30.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20210813_052827_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  03939000 025A5800 03777400 02CCCE00 03AAA900 027FFD80 03400340 02E002E0 01900390 03580250 00F40370
      00F40370 008E02C0 00C903A0 0156C130 02FED0D0 0181B8B0 014164E0 03E1D690 00113DD0 0219A330 031572A0
      031572A0 009FCBF0 00D02E00 00B83900 007212C0 02258DD0 01374B30 01ACEEA0 037A99F0 02C7D500 03A43F80
      03A43F80 02762040 034D3060 00EBA850 029E7C70 01E8A120 018E78D0 034944B0 02EDE6E0 019B1590 03569F50
      03569F50 00FDD0F0 00833880 00C2A4C0 00A3F6A0 02F20DF0 01C58580 0093A3A0 02DA7270 03B74B40 026CEEE0
      026CEEE0 015A9990 03F7D550 000C3FF0 000A2000 000F3000 0008A800 00067E00 0002A080 0003F0C0 000208A0
      000208A0 02030CF0 03028A80 0283CFC0 03C22820 00233C30 0032A220 022BF330 039F0550 002843F0 003C6200
      003C6200 00225300 00337A80 002AC7C0 003FA420 02207630 03304D20 00A86BB0 00FC5E60 034138A0 0070D270
      0070D270 0048BB40 006CE6E0 025A9590 0177DF50 03CC30F0 022A2880 033F3CC0 02A0A2A0 01F0F3F0 00844500
      00844500 006333C0 0052AA20
     
