-- OK --
-----------------> BLESK ver.2021-02-27 run on Sun Dec 12 07:48:38 2021 UTC
-- File 20210811_140218_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2021-08-11T14:02:21.000.000.000 to 2021-08-11T14:02:21.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20210811_140218_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  0341D380 02E13A40 0391A760 005974D0 0275CEB0 034F29E0 00E8BD10 029CE390 02E94920 00CEF6D0 0154C6D0
      0154C6D0 01FF52D0 01807DD0 03404330 02E062A0 019053F0 01587A00 01F44700 010E6480 018956C0 014DFDA0
      014DFDA0 03EB0370 010F4160 03C470E0 00264890 02356CD0 012FDAB0 01B837E0 03642C10 00D63A10 02BD2710
      02BD2710 01E3B490 03126ED0 004DACD0 0135BD50 03AF63F0 0278D200 0344BB00 02E6E680 039595C0 025F5F20
      025F5F20 0170F0B0 01C888E0 032CCC90 025D5560 02B9FFE0 01E50010 03178010 009C4010 02D26010 01BB5010
      01BB5010 0366F810 00D58410 02BF4610 01E0E510 03884BC0 03263710 00B52C90 02EFBAD0 019867B0 01545460
      01545460 03FE7E50 00014170 0001E1C0 00011120 020199B0 0380AAB0 03207FF0 02B04000 03E86000 021C5000
      021C5000 03127800 029B4400 03D6E600 023D9500 03235F80 02B2F040 03F5C430 03079310 00845A90 02C677D0
      02C677D0 01A54C30 0177EA20 03CC1F30 022A10A0 013F18F0 01A09480 0170DEC0 02E458D0 00CB3A50 02AEA770
      02AEA770 03F9F4C0 02050EA0
     
