-- OK --
-----------------> BLESK ver.2021-02-27 run on Sat Dec 11 16:52:50 2021 UTC
-- File 20210810_121617_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2021-08-10T12:16:20.000.000.000 to 2021-08-10T12:16:20.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20210810_121617_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  035BE9A0 00F61D70 008D13C0 00CB9A20 02AE5730 03F97CA0 0005C2F0 00072380 0004B240 0006EB60 0302CF60
      0302CF60 0241D460 01613E50 03D1A170 023971C0 0325C920 00B72DB0 00ECBB60 029AE6D0 01D795B0 013C5F60
      013C5F60 03D13860 021CD220 0112BB30 019BE6A0 035615F0 02FD1F00 03839080 024258C0 036374A0 00D2CEF0
      00D2CEF0 00BBA980 00733EA0 012550F0 01B7F880 016C04C0 01DA06A0 033705F0 02AC8700 03FAC480 0207A6C0
      0207A6C0 030475A0 00864F70 0062B460 0329F720 00BD0CB0 00E38AE0 02924F90 01DB6850 0336DC70 02ADB240
      02ADB240 03FB6B60 0006DED0 0205B1B0 0383B4B0 03213770 02B1ACC0 03E97AA0 001DC7F0 00132400 001AB600
      001AB600 0017ED00 001C1B80 00121640 001B1D60 030B49E0 02477680 0364CDC0 02D6AB20 01BDFEB0 016301E0
      016301E0 03D28110 003BC190 02262150 013531F0 01AFA900 00BC3EC0 027110D0 014998B0 01ED54E0 031BFE90
      031BFE90 009601D0 02DD0130 03B381A0 006A4170 005F61C0 0070D120 01245CD0 01DB3950 0336A5F0 02ADF700
      02ADF700 03FB0C80 02068AC0
     
