-- OK --
-----------------> BLESK ver.2021-02-27 run on Sat Dec 11 08:42:08 2021 UTC
-- File 20210810_063132_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2021-08-10T06:31:35.000.000.000 to 2021-08-10T06:31:35.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20210810_063132_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  034341E0 00E2E110 02939190 01DA5950 019BBAF0 00AB33C0 027F5510 02A07FC0 03F04020 00086030 000C5020
      000C5020 020A7830 030F4420 0088E630 00CC9520 02AADFB0 03FFB060 02003420 00801710 02C01C90 01A012D0
      01A012D0 03701BB0 02C81660 01AC1D50 037A13F0 02C71A00 03A49700 0276DC80 01A6D960 03BADAE0 0067B790
      0067B790 02546C50 017E5A70 01C17740 0121CCE0 03B12A90 0069BFD0 025D6030 0373D020 00651C10 032BC900
      032BC900 02BE2D80 03E13B40 0211A6E0 01197590 0395CF50 005F28F0 0070BC80 0048E2C0 006C93A0 012D6D30
      012D6D30 02DDEDD0 01B31B30 016A96A0 03DFDDF0 02303300 03282A80 02BC3FC0 03E22020 00133030 001AA820
      001AA820 010BFE10 03C70080 022480C0 0336C0A0 00ADA0F0 00FB7080 0086C8C0 00C5ACA0 02A77AF0 03F4C780
      03F4C780 020EA440 0384FB30 03234350 00B2E2F0 00EB9380 009E5A40 00D17760 02B9CCD0 01E52AB0 0117BFE0
      0117BFE0 039C6010 00525010 033DBC00 0151B100 01F96980 0105DD40 018733E0 0344AA10 00E6FF10 02958090
      02958090 01DF40D0 0330E0B0
     
