-- OK --
-----------------> BLESK ver.2021-02-27 run on Wed Dec  8 18:16:46 2021 UTC
-- File 20210807_031923_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2021-08-07T03:19:26.000.000.000 to 2021-08-07T03:19:26.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20210807_031923_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  0155CE50 03FF2970 0200BDC0 0300E320 008092B0 00C0DBE0 02A0B610 01F0ED10 03089B90 008CD650 02CABD70
      02CABD70 03AFE3C0 02781220 00A20D90 02F30B50 018A8EF0 014FC980 01E82D40 011C3BE0 03922610 005B3510
      005B3510 0276AF90 014DF850 01F58230 0287A190 01C47150 032649F0 02B56D00 03EFDB80 02183640 03142D60
      03142D60 009E3BD0 02D12630 03B9B520 0032B7D0 0115F610 039F0D10 00508B90 0278CE50 0144A970 01E6FDC0
      01E6FDC0 01158320 039F42B0 0250E3E0 01789210 03E26D80 0109ADA0 038D7B70 024BC6C0 036E25A0 00D93770
      00D93770 00B5ACC0 00EF7AA0 0298C7F0 03D4A400 023EF600 0190C680 00AC52E0 02FA7B90 01874650 0344E570
      0344E570 02E697C0 0395DC20 005F3230 0070AB20 0248FEB0 036C81E0 026D6080 01ADE860 037B1C50 00C69270
      00C69270 00A5DB40 00F736E0 028CAD90 01CAFB50 032F86F0 02B84580 03E46740 030B2A70 01475FA0 03E4F070
      03E4F070 02168840 031DCC60 00932A50 02DABF70 03B7E0C0 026C10A0 015A18F0 01F71480 00864F60 0362B460
      0362B460 00D3EE50 02BA1970
     
