-- OK --
-----------------> BLESK ver.2021-02-27 run on Thu Nov  4 09:11:51 2021 UTC
-- File 20210706_002027_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2021-07-06T00:20:25.000.000.000 to 2021-07-06T00:20:25.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20210706_002027_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  03930B80 025A8E40 0377C960 00CC2DD0 02AA3B30 03FF9350 00005AF0 00007780 00004C40 00006A60 02005F50
      02005F50 010070F0 01804880 01406CC0 01E05AA0 01883BF0 00A61300 00F51A80 008F97C0 00C85C20 02AC7230
      02AC7230 03FA4B20 00076EB0 0004D9E0 0206B510 0105EF90 03C38C20 00112510 0219B790 01156C50 039FDA70
      039FDA70 02503740 03782CE0 00C43A90 02A627D0 01F53430 010FAE20 01C43C90 03931160 005A99D0 0277D530
      0277D530 034C3FA0 00EA2070 009F3040 00D0A860 02B8FC50 01E48270 0116C340 02CED170 01D4DCE0 033EB290
      033EB290 00A1EBD0 02F11E30 03899120 004D59B0 006BF560 025E0FD0 01710830 01C98C20 0196A510 03AEFBC0
      03AEFBC0 02798620 01454530 01E7E7A0 03141470 029E1E40 03D11160 003999D0 02255530 0337FFA0 00560030
      00560030 023E8010 0121C010 03B12010 0069B010 025D6810 0173DC10 03CA3210 002F2B10 0238BE90 0124E1D0
      0124E1D0 01DB4890 039B7660 0056CD50 027DABF0 03437E00 02E2C100 0393A180 025A7140 037749E0 00CCED10
      00CCED10 02AA9B90 02FFEB20
     
