-- OK --
-----------------> BLESK ver.2021-02-27 run on Tue Jun  8 08:47:29 2021 UTC
-- File 20210608_081307_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2021-06-08T08:13:10.000.000.000 to 2021-06-08T08:13:10.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20210608_081307_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  004ED7D0 0269BC30 03AEB110 023CF4C0 03914750 002CF270 003A8B40 0027CEE0 02342990 012E3D50 03B923F0
      03B923F0 0265B200 03576B00 02FCDE80 0382B1C0 0321F490 02588760 0174C4D0 03CEA6B0 0229F5E0 013D0F10
      013D0F10 03A38890 00724CD0 024B6AB0 036EDFE0 00D9B010 035AB400 017BF700 01C60C80 01250AC0 01B78FA0
      01B78FA0 036C4870 02DA6C40 03B75A60 006CF750 025A8CF0 0377CA80 016617E0 03EA8E00 021FC900 03102D80
      03102D80 02983B40 03D426E0 003E3590 02212F50 0131B8F0 01A96480 017DD6C0 02E19ED0 00C8A8D0 02ACFCB0
      02ACFCB0 03FA82E0 0007C390 02042250 01063370 01852AC0 0147BFA0 03E46070 02165040 038EBC30 0324F110
      0324F110 00B68990 02EDCD50 019B2BF0 0156BE00 01FDE100 01031180 01829940 0143D5E0 03E23F10 02099040
      02099040 0386AC30 0245FA20 01670730 01D484A0 033EC6F0 02A1A580 03F17740 0209CCE0 010D2A90 038BBFD0
      038BBFD0 00273010 031A5400 02977E00 03DCC100 0232A180 032BF140 02BE09E0 01E10D10 03118B90 00994E50
      00994E50 02D5E970 01DF8EE0
     
