-- OK --
-----------------> BLESK ver.2021-02-27 run on Sun Apr 18 11:32:17 2021 UTC
-- File 20210418_112454_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2021-04-18T11:24:57.000.000.000 to 2021-04-18T11:24:57.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20210418_112454_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  00A00B30 00F00EA0 028809F0 03CC0D00 022A0B80 033F0E40 02A08960 01F0CDD0 0308AB30 028CFEA0 01CA81F0
      01CA81F0 012FC100 01B82180 01643140 01D629E0 039E9E80 0128E8E0 03BC9C90 0062D2D0 0253BBB0 037A6660
      037A6660 00C75550 02A4FFF0 03F68000 020DC000 030B2000 01475800 00F27A00 008B4700 00CEE480 00A996C0
      00A996C0 00FD5DA0 0283F370 03C20AC0 02230FA0 01328870 01ABCC40 02BF1530 03F04FD0 00086830 000C5C20
      000C5C20 020A7230 030F4B20 0088EEB0 00CC99E0 02AAD510 01FFBF90 03006050 00402830 02301E10 01281110
      01281110 03BC1990 00621550 02531FF0 037A9000 02C7D800 03A43400 02762E00 034D3900 0175D2C0 02E79DD0
      02E79DD0 01945330 015E7AA0 03F147F0 0209E400 030D1600 028B9D00 03CE5380 02297A40 033DC760 02519260
      02519260 02BCADA0 01E2FB70 011386C0 019A45A0 03576770 02FCD4C0 0382BEA0 0043E1F0 00621100 00531980
      00531980 003D4AA0 0111F7F0 01990C00 01558A00 01FF4F00 0100E880 01809CC0 0140D2A0 03E0BBF0 0210E600
      0210E600 03189500 014A6FC0
     
