-- OK --
-----------------> BLESK ver.2021-02-27 run on Sun Apr 18 11:25:23 2021 UTC
-- File 20210418_111703_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2021-04-18T11:17:06.000.000.000 to 2021-04-18T11:17:06.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20210418_111703_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  0099C1A0 02D52170 01DFD8E0 03981A40 032A0BB0 02BF0E60 01E08950 0310CDF0 0298AB00 03D4FE80 023E81C0
      023E81C0 0321C120 00B121B0 00E9B160 034EB4E0 0274F740 034E8CE0 00E9CA90 029D2FD0 01D3B830 013A6420
      013A6420 03A75630 0274FD20 014E83B0 01E9C260 038E91A0 0024ECB0 00369AE0 022DD790 013B3C50 03A6A270
      03A6A270 0275F340 034F0AE0 00E88F90 029CC850 01D2AC70 009DFD20 016981D0 03DD4130 0233E1A0 012A1170
      012A1170 01BF19C0 01609520 03D0DFB0 0238B060 0124E850 03B69C70 0136E920 01D6CED0 033DA9B0 02A37D60
      02A37D60 01F2C3D0 030BA230 028E7320 01C94AB0 012DEFE0 03BB1810 00669410 032AEF00 015FCC40 01F02A60
      01F02A60 03083F50 008C20F0 00CA3080 00AF28C0 00F8BCA0 0284E2F0 03C69380 0225DA40 039B9BB0 032B2B30
      032B2B30 02BEBEA0 01E1E1F0 01111100 01999980 01555540 01FFFFE0 03000010 00800010 02C00010 02D00000
      02D00000 01DC0000 01320000 01AB0000 017E8000 01C1C000 01212000 01B1B000 01696800 01DDDC00 01333200
      01333200 00D55580 005FFFA0
     
